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TLC5540 — DC level at ADC input creating errors
All content and materials on this site are provided “as is”. Jan 21, 2: In reply to Jim Brinkhurst Even the signal source as well as the input signal applied to the device is same as earlier. Jan 1, 3: Best regards, Jim B. Please see snapshots below. I think you need to simulate your input circuit to see the response that it is providing.
Jan 2, 4: Input to analog switch in AC path 3. You said “It tlc55440 best to use a single 9-bit or larger translator for the 8 bits and the clock to minimize skew between data bits and clock. The speed is slow enough that there is quite a bit of timing margin, so it may not be too critical.
Ask a related question What is a related question? Output of analog switch in AC path 4. In reply to lei gong:.
For your 5V reference, the signal should be centered at 2. Content on this site may contain or be subject to specific guidelines or limitations on use. Therefore you need to bias the ADC at 1. What is the voltage at pin 5 of U12? Jan 17, 1: If the clock driver is far away from the TLCyou may need to properly terminate the transmission line to avoid overshoot and avoid tlc5540 the absolute maximum voltage levels.
When the clock is not driven from FPGA, the offset drops down to zero. No license, either express or implied, by estoppel or otherwise, is granted by TI.
[Resolved] TLC – Data converters forum – Data converters – TI E2E Community
Do you alternate which is open and which is closed? Regarding your divider, can you tell me your expected analog input voltage range? TI and its respective suppliers and providers of content make no representations about the suitability of these materials for any purpose and disclaim all warranties and conditions with regard to these materials, including but not limited to all implied warranties and conditions of merchantability, fitness for a particular purpose, title and non-infringement of any third party intellectual property right.
This thread has been locked. So we isolated the comparator input from the circuit by removing the series resistor R We tried to change back to the previous configuration too.
We have limited ourselves to work with 1Vpp signal now such that the input voltage doesn’t go higher than the ADC’s input range with the DC offset. The newly created question will be automatically linked to this question. Do you have another question? In reply to Matt Guibord: